GTL2014PWZ 总线收发器
Voltage Level Translator GTL/GTL+/GTL- to LVTTL/LVTTL to GTL/GTL+/GTL- 4-CH Bidirectional 14-Pin TSSOP T/R
GTL2014PWZ 总线收发器 的技术参数：
|
制造商 |
NXP |
|
型号 |
GTL2014PWZ |
|
产品种类 |
总线收发器 |
|
RoHS |
是 |
|
封装 |
TSSOP14 |
|
温度规格（度） |
-40 to 85 |
|
电压规格（伏） |
3 to 3.6 |
|
封装 |
Reel |
|
封装 |
Cut Tape |
|
商标 |
NXP Semiconductors |
|
产品类型 |
Bus Transceivers |
|
工厂包装数量 |
2500 |
GTL2014PWZ 总线收发器 的描述：
The GTL2014 is a 4-bit translating transceiver designed for 3.3 V LVTTL system interface with a GTL-/GTL/GTL+ bus, where GTL-/GTL/GTL+ refers to the reference voltage of the GTL bus and the input/output voltage thresholds associated with it.
The direction pin allows the part to function as either a GTL to LVTTL sampling receiver or as a LVTTL to GTL interface. The GTL2014 LVTTL inputs (only) are tolerant up to 5.5 V allowing direct access to TTL or 5 V CMOS inputs. The LVTTL outputs are not 5.5 V tolerant.
The GTL2014 GTL inputs and outputs operate up to 3.6 V, allowing the device to be used in higher voltage open-drain output applications. GTL2014 is pin-to-pin backward compatible to the GTL2005 (labels for A port and B port are interchanged). GTL2014’s Vref tracks down to 0.5 V for low voltage CPU, propagation delays are slightly longer, while GTL2005’s Vref linearity degrades below 0.8 V and has shorter propagation delay.
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