K4B4G1646D-BFMA动态随机存储器
K4B4G1646D-BFMA03V
DRAM DDR3 4Gb 256M x 16, Speed 1866 Mbps
K4B4G1646D-BFMA动态随机存储器的技术参数：
Density 4 Gb
Org. 256M x 16
Speed 1866 Mbps
Voltage 1.35 V
Temp. -40 ~ 95 °C
K4B4G1646D-BFMA动态随机存储器的描述：
The DDR3 SDRAM is a high-speed CMOS, dynamic random-access memory internally configured as a eight-bank DRAM.
The DDR3 SDRAM uses a 8n prefetch architecture to achieve high-speed operation.
The 8n prefetch architecture, with an interface designed to transfer two data words per clock cycle at the I/O pins. A single read or write access for the DDR3 SDRAM consists of a single 8n-bit wide, four clock data transfer at the internal DRAM core and two corresponding n-bit wide, one-half clock cycle data transfers at the I/O pins.
Read and write operation to the DDR3 SDRAM are burst oriented, start at a selected location, and continue for a burst length of four or eight in a programmed sequence. Operation begins with the registration of an Active command, which is then followed by a Read or Write command.
The address bits registered coincident with the Active command are used to select the bank and row to be accessed (BA0-BA2 select the bank; A0-A15 select the row).
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