NT5CC128M16JR-EKI 原装 LPDDR3
NT5CC128M16JR-EKI 原装 LPDDR3的技术参数：
|
产品类别 |
第三代低功耗双倍数据率同步动态随机存储器 |
|
存储格式 |
DRAM |
|
存储技术 |
SDRAM-DDR3L |
|
存储容量 |
2Gb （128M x 16） |
|
存储接口 |
并联 |
|
电压-电源 |
1.283V ~ 1.45V |
|
工作温度 |
-40°C ~ 95°C（TC） |
|
安装类型 |
表面贴装 |
|
封装/外壳 |
FBGA96 |
|
时钟频率 |
933MHZ |
|
数据速率 |
1866mbps |
|
Interface And Power |
SSTL_135 (1.35V,1.35V) |
|
外包装 |
TRAY |
NT5CC128M16JR-EKI 原装 LPDDR3的描述：
The 2Gb Double-Data-Rate-3 (DDR3(L)) is double data rate architecture to achieve high-speed operation. It is internally configured as an eight bank DRAMs. The 2Gb chip is organized as 32Mbit x 8 I/Os x 8 banks or 16Mbit x 16 I/Os x 8 bank devices.
These synchronous devices achieve high speed double-data-rate transfer rates of up to 1866 Mb/sec/pin for general applications. The chip is designed to comply with all key DDR3(L) DRAM key features and all of the control and address inputs are synchronized with a pair of externally supplied differential clocks.
Inputs are latched at the cross point of differential clocks (CK rising and CK falling). All I/Os are synchronized with a single ended DQS or differential DQS pair in a source synchronous fashion.
These devices operate with a single 1.5V ± 0.075V or 1.35V -0.067V/+0.1V power supply and are available in BGA packages.
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