深圳市迅丰达电子科技有限公司

NT5CC256M16DP-DI 原装 LPDDR3

NT5CC256M16DP-DI 原装 LPDDR3的描述：

The 1Gb Double-Data-Rate-3 (DDR3/L) B-die DRAMs is double data rate architecture to achieve high-speed operation. It is internally configured as an eight bank DRAM. The 1Gb chip is organized as 16Mbit x 8 I/Os x 8 banks or 8Mbit x 16 I/Os x 8 bank devices. These synchronous devices achieve high speed double-data-rate transfer rates of up to 2133 Mb/sec/pin for general applications.

The 4Gb Double-Data-Rate-3 DDR3L DRAM is a high-speed CMOSSDRAM containing 4,294,967,296 bits. It is internally configured as an octal-bank DRAM. The 4Gb chip is organized as 64Mbit x 8I/O x 8 banksand 32Mbit x16I/O x 8 banks.

 These synchronous devices achieve high speed double-data-rate transfer rates of up to 2133Mb/sec/pin for general applications.The chip is designed to comply with all keyDDR3(L)DRAM key featuresand all of the control and address inputs are synchronized with a pair of externally supplied differential clocks. Inputs are latched at the cross point of differential clocks (CK rising and CK falling).

All I/Os are synchronized with a single ended DQS or differential DQS pair in a source synchronous fashion. These devices operate with a single 1.5V ± 0.075V or1.35V -0.067V/+0.1Vpower supply and are available in BGA packages.

NT5CC256M16DP-DI 原装 LPDDR3的技术参数：